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PT6315 VFD Driver/Controller IC
DESCRIPTION
PT6315 is a Vacuum Fluorescent Display (VFD) Controller driven on a 1/4 to 1/12 duty factor. Sixteen segment output lines, 4 grid output lines, 8 segment/grid output drive lines, one display memory, control circuit, key scan circuit are all incorporated into a single chip to build a highly reliable peripheral device for a single chip micro computer. Serial data is fed to PT6315 via a three-line serial interface. It is housed in a 44-pin LQFP.
FEATURES
* * * * * * * * * CMOS Technology Low Power Consumption Key Scanning (16 x 2 matrix) Multiple Display Modes: (16 segments, 12 digits to 24 segments, 4 digits) 8-Step Dimming Circuitry LED Ports Provide (4 channels, 20mA max.) Serial Interface for Clock, Data Input, Data Output, Strobe Pins No External Resistors Needed for Driver Outputs Available in 44-pin LQFP
APPLICATION
* Microcomputer Peripheral Devices
BLOCK DIAGRAM
Tel: 886-66296288Fax: 886-29174598 http://www.princeton.com.tw2F, 233-1, Baociao Road, Sindian, Taipei 23145, Taiwan
PT6315
APPLICATION CIRCUIT
Note: The capacitor (0.1F) connected between the GND and the VDD pins must be located as close as possible to the PT6315 chip.
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ORDER INFORMATION
Valid Part Number PT6315 Package Type 44-pin, LQFP Top Code PT6315
PIN CONFIGURATION
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PT6315
PIN DESCRIPTION
Pin Name LED1 to LED4 OSC DOUT DIN (Schmitt Trigger) CLK (Schmitt Trigger) STB (Schmitt Trigger) K1, K2 VSS VDD SG1/KS1 to SG16/KS16 VEE SG17/GR12 to SG24/GR5 GR4 to GR1 I/O O I O I I I I O O O Description LED Output Pin Oscillator Input Pin A resistor is connected to this pin to determine the oscillation frequency. Data Output Pin (N-Channel, Open-Drain) This pin outputs serial data at the falling edge of the shift clock (starting from the lower bit). Data Input Pin This pin inputs serial data at the rising edge of the shift clock (starting from the lower bit). Clock Input Pin This pin reads serial data at the rising edge and outputs data at the falling edge. Serial Interface Strobe Pin The data input after the STB has fallen is processed as a command. When this in is "HIGH", CLK is ignored. Key Data Input Pins The data inputted to these pins is latched at the end of the display cycle. Logic Ground Pin Logic Power Supply High-Voltage Segment Output Pins Also acts as the Key Source. Pull-Down Level High-Voltage Segment/Grid Output Pins High-Voltage Grid Output Pins Pin No. 1 to 4 5 6 7 8 9 10, 11 12, 44 13, 43 14 to 29 30 31 to 38 39 to 42
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PT6315
INPUT/OUTPUT CONFIGURATIONS
The schematic diagrams of the input and output circuits of the logic section are shown below:
OUTPUT PINS: SGn, GRn
INPUT PINS: DIN, CLK, STB
INPUT PINS: K1, K2
OUTPUT PIN: DOUT
OUTPUT PINS: LED1 TO LED4
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PT6315
FUNCTION DESCRIPTION
COMMANDS
Commands determine the display mode and status of PT6315. A command is the first byte (b0 to b7) inputted to PT6315 via the DIN Pin after STB Pin has changed from "HIGH" to "LOW" State. If for some reason the STB Pin is set to "HIGH" while data or commands are being transmitted, the serial communication is initialized, and the data/commands being transmitted are considered invalid.
COMMAND 1: DISPLAY MODE SETTING COMMANDS
PT6315 provides 8 display mode settings as shown in the diagram below: As stated earlier a command is the first one byte (b0 to b7) transmitted to PT6315 via the DIN Pin when STB is "LOW". However, for these commands, the bits 5 to 6 (b4 to b5) are ignored, bits 7 & 8 (b6 to b7) are given a value of "0". The Display Mode Setting Commands determine the number of segments and grids to be used (1/4 to 1/12 duty, 16 to 24 segments). When these commands are executed, the display is forcibly turned off, the key scanning stops. A display command "ON" must be executed in order to resume display. If the same mode setting is selected, no command execution is take place, therefore, nothing happens. When Power is turned "ON", the 12-digit, 16-segment modes is selected. MSB 0 0 b3 b2 b1 LSB b0
Not Relevant
Display Mode Settings: 0000: 4 digits, 24 segments 0001: 5 digits, 23 segments 0010: 6 digits, 22 segments 0011: 7 digits, 21 segments 0100: 8 digits, 20 segments 0101: 9 digits, 19 segments 0110: 10 digits, 18 segments 0111: 11 digits, 17 segments 1XXX: 12 digits, 16 segments
DISPLAY MODE AND RAM ADDRESS
Data transmitted from an external device to PT6315 via the serial interface are stored in the Display RAM and are assigned addresses. The RAM Addresses of PT6315 are given below in 8 bits unit. SG1 SG4 00HL 03HL 06HL 09HL 0CHL 0FHL 12HL 15HL 18HL 1BHL 1EHL 21HL SG5 SG8 00HU 03HU 06HU 09HU 0CHU 0FHU 12HU 15HU 18HU 1BHU 1EHU 21HU b0 xxHL Lower 4 bits V2.8 6 SG9 SG12 01HL 04HL 07HL 0AHL 0DHL 10HL 13HL 16HL 19HL 1CHL 1FHL 22HL SG13 SG16 01HU 04HU 07HU 0AHU 0DHU 10HU 13HU 16HU 19HU 1CHU 1FHU 22HU b3 b4 xxHU Higher 4 bits September, 2009 SG17 SG20 02HL 05HL 08HL 0BHL 0EHL 11HL 14HL 17HL 1AHL 1DHL 20HL 23HL SG21 SG24 02HU 05HU 08HU 0BHU 0EHU 11HU 14HU 17HU 1AHU 1DHU 20HU 23HU DIG1 DIG2 DIG3 DIG4 DIG5 DIG6 DIG7 DIG8 DIG9 DIG10 DIG11 DIG12
b7
PT6315 COMMAND 2: DATA SETTING COMMANDS
The Data Setting Commands executes the Data Write or Data Read Modes for PT6315. The data Setting Command, the bits 5 and 6 (b4, b5) are ignored, bit 7 (b6) is given the value of "1" while bit 8 (b7) is given the value of "0". Please refer to the diagram below. When power is turned ON, the bit 4 to bit 1 (b3 to b0) are given the value of "0". MSB 0 1 b3 b2 b1 LSB b0
Not Relevant
Data Write & Read Mode Settings: 00: Write Data to Display Mode 01: Write Data to LED Port 10: Read Key Data 11: Not Relevant Address Increment Mode Settings (Display Mode): 0: Increment Address after Data has been Written 1: Fixed Address Mode Settings: 0: Normal Operation Mode 1: Test Mode
PT6315 KEY MATRIX & KEY INPUT DATA STORAGE RAM
PT6315 Key Matrix consists of 16 x 2 array as shown below:
Each data inputted by each key are stored as follows. They are read by a READ Command, starting from the last significant bit. When the most significant bit of the data (SG16, b7) has been read, the least significant bit of the next data (SG1, b0) is read. K1...................K2 SG1/KS1 SG5/KS5 SG9/KS9 SG13/KS13 b0...................b1 K1...................K2 SG2/KS2 SG6/KS6 SG10/KS10 SG14/KS14 b2...................b3 K1...................K2 SG3/KS3 SG7/KS7 SG11/KS11 SG15/KS15 b4...................b5 K1...................K2 SG4/KS4 SG8/KS8 SG12/KS12 SG16/KS16 b6...................b7
Reading Sequence
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PT6315
LED DISPLAY
PT6315 provides 4 LED Display Terminals, namely LED1 to LED4. Data is written to the LED Port starting from the least significant bit (b0) of the port using a WRITE Command. Each bit starting from the least significant (b0) activates a specific LED Display Terminal -- b0 corresponds LED1 Display, b1 activates LED2 and so forth. Since there are only 4 LED display terminals, bits 5 to 8 (b4 ~ b7) are not used and therefore ignored. This means that b4 to b7 does NOT in anyway activate any LED Display, they are totally ignored. When a bit (b0 ~ b3) in the LED Port is "1", the corresponding LED is OFF. Conversely, when the bit is "0", the LED Display is turned ON. For example, Bit 1 (as designated by b0) has the value of "1", then this means that LED1 is OFF. It must be noted that when power is turned ON, bit 1 to bit 4 (b0 to b3) are given the value of "0" (all LEDs are turned ON). Please refer to the diagrams below. MSB b3 b2 b1 LSB b0 LED1 Not Used LED2 LED3 LED4
COMMAND 3: ADDRESS SETTING COMMANDS
Address Setting Commands are used to set the address of the display memory. The address is considered valid if it has a value of "00H" to "23H". If the address is set to 24H or higher, the data is ignored until a valid address is set. When power is turned ON, the address is set at "00H". Please refer to the diagram below. MSB 1 1 b5 b4 b3 b2 b1 LSB b0
Address: 00H to 23H
COMMAND 4: DISPLAY CONTROL COMMANDS
The Display Control Commands are used to turn ON or OFF a display. It also used to set the pulse width. Please refer to the diagram below. When the power is turned ON, a 1/16 pulse width is selected and the displayed is turned OFF (the key scanning is stopped). MSB 1 0 b3 b2 b1 LSB b0
Not Relevant
Dimming Quantity Settings: 000: Pulse width = 1/16 001: Pulse width = 2/16 010: Pulse width = 4/16 011: Pulse width = 10/16 100: Pulse width = 11/16 101: Pulse width = 12/16 110: Pulse width = 13/16 111: Pulse width = 14/16 Display Settings: 0: Display Off (Key Scan Continues) 1: Display On
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PT6315
SCANNING AND DISPLAY TIMING
The Key Scanning and display timing diagram is given below. One cycle of key scanning consists of 2 frames. The data of the 16 x 2 matrix is stored in the RAM. Internal Operating Frequency (fosc) = 224/T
Note: T is the width of Segment only
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PT6315
SERIAL COMMUNICATION FORMAT
The following diagram shows the PT6315 serial communication format. The DOUT Pin is an N-channel, open-drain output pin, therefore, it is highly recommended that an external pull-up resistor (1K to 10K) must be connected to DOUT.
where: twait (waiting time) 1 s It must be noted that when the data is read, the waiting time (twait) between the rising of the eighth clock that has set the command and the falling of the first clock that has read the data is greater or equal to 1 s.
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PT6315
SWITCHING CHARACTERISTIC WAVEFORM
PT6315 Switching Characteristics Waveform is given below.
where: fosc = Oscillation Frequency PWSTB (Strobe Pulse Width) 1 s tsetup (Data Setup Time) 100 ns tTZH1 (Segment Rise Time) 2.0 s (VDD = 5 V) tTZH2 (Grid Rise Time) 0.5 s (VDD = 5 V) tTHZ (Segment & Grid Fall Time) 150 s tPLZ (Propagation Delay Time) 400 ns (VDD = 5 V)
PWCLK (Clock Pulse Width) 400 ns tCLK-STB (Clock - Strobe Time) 1 s thold (Data Hold Time) 100 ns tTZH1 (Segment Rise Time) 4.0 s (VDD = 3.3 V) tTZH2 (Grid Rise Time) 1.2 s (VDD = 3.3 V) tPZL (Propagation Delay Time) 100 ns tPLZ (Propagation Delay Time) 600 ns (VDD = 3.3 V)
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PT6315
APPLICATIONS
Display memory is updated by incrementing addresses. Please refer to the following diagram.
where: Command 1: Display Mode Setting Command Command 2: Data Setting Command Command 3: Address Setting Command Data 1 to n: Transfer Display Data (36 bytes max.) Command 4: Display Control Command
The following diagram shows the waveforms when updating specific addresses.
where: Command 2: Data Setting Command Command 3: Address Setting Command Data: Display Data
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RECOMMENDED SOFTWARE FLOWCHART
Notes: 1. Command 1: Display Mode Commands 2. Command 2: Data Setting Commands 3. Command 3: Address Setting Commands 4. Command 4: Display Control Commands 5. When IC power is applied for the first time, the contents of the Display RAM are not defined; thus, it is strongly suggested that the contents of the Display RAM be cleared during the initial setting.
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PT6315
ABSOLUTE MAXIMUM RATINGS
(Unless otherwise stated, Ta = 25, GND = 0 V) Parameter Symbol Logic Supply Voltage VDD Driver Supply Voltage VEE Logic Input Voltage VI VFD Driver Output Voltage VO LED Driver Output Current IOLED VFD Driver Output Current Operating Temperature Storage Temperature IOVFD Topr Tstg Ratings -0.3 to +7 VDD +0.3 to VDD -40 -0.3 to VDD +0.3 VEE-0.3 to VDD +0.3 20 -40 (Grid) -15 (Segment) -40 to +85 -65 to +150 Unit V V V V mA mA
RECOMMENDED OPERATING RANGE
(Unless otherwise stated, Ta = 25, GND = 0 V) Parameter Logic Supply Voltage High-Level Input Voltage Low-Level Input Voltage Driver Supply Voltage POWER SUPPLY SEQUENCE Symbol VDD VIH VIL VEE Min. 3.0 0.7VDD 0 VDD-35 Ratings Typ. 5 Max. 5.5 VDD 0.3VDD 0 Unit V V V V
Note: The power on/off sequence suggestion: Applications must observe the following sequence when turning the power on or off. * At power on: First turn on the logic system power (VDD), and then turn on the driver power (VEE). * At power off: First turn off the driver power (VEE), and then turn off the logic system power (VDD).
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ELECTRICAL CHARACTERISTICS
(Unless otherwise stated, VDD = 5 V, GND = 0 V, VEE = VDD-35 V, Ta = 25) Parameter Symbol Test Condition IOHLED = -12 mA High-Level Output Voltage VOHLED LED1 to LED4 IOLLED = +15 mA Low-Level Output Voltage VOLLED LED1 to LED4 DOUT, Low-Level Output Voltage VOLDOUT IOLDOUT = 4 mA VO = VDD-2 V High-Level Output Current IOHSG SG1/KS1 to SG16/KS16 VO = VDD-2 V High-Level Output Current IOHGR GR1 to GR4, SG17/GR12 to SG24/GR5 Oscillation Frequency fosc R = 82 K VDD = 5 V Schmitt-Trigger Transfer Voltage (+) VT+ (DIN, CLK, STB) VDD = 5 V Schmitt-Trigger Transfer Voltage (-) VT(DIN, CLK, STB) VDD = 5 V Hysteresis Voltage Vhys (DIN, CLK, STB) VI = VDD or VSS Input Current II Dynamic Current Consumption IDDdyn Under no load, Display OFF
Note: The frequency value is for PTC test condition: fosc = 224/T (see page 9 for detailed data)
Min. VDD-1 -3 -15 350 2.7 0.7 1.4 -
Typ. 500 3 1.0 2.0 -
Max. 1 0.4 650 3.3 1.3 1 5
Unit V V V mA mA KHz V V V A mA
(Unless otherwise stated, VDD = 3.3 V, GND = 0 V, VEE = VDD-35 V, Ta = 25) Parameter Symbol Test Condition IOHLED = -6 mA High-Level Output Voltage VOHLED LED1 to LED4 IOLLED = +15 mA Low-Level Output Voltage VOLLED LED1 to LED4 Low-Level Output Voltage VOLDOUT DOUT, IOLDOUT = 4 mA VO = VDD-2 V High-Level Output Current IOHSG SG1/KS1 to SG16/KS16 VO = VDD-2 V High-Level Output Current IOHGR GR1 to GR4, SG17/GR12 to SG24/GR5 Oscillation Frequency fosc R = 100 K VDD = 3.3 V Schmitt-Trigger Transfer Voltage (+) VT+ (DIN, CLK, STB) VDD = 3.3 V Schmitt-Trigger Transfer Voltage (-) VT(DIN, CLK, STB) VDD = 3.3 V Hysteresis Voltage Vhys (DIN, CLK, STB) Input Current II VI = VDD or VSS Dynamic Current Consumption IDDdyn Under no load, Display OFF
Note: The frequency value is for PTC test condition: fosc = 224/T (see page 9 for detailed data)
Min. VDD-1 -1.5 -6 350 1.8 0.2 1.0 -
Typ. 500 2.0 0.4 1.6 -
Max. 1 0.4 650 2.2 0.6 1 3
Unit V V V mA mA KHz V V V A mA
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PT6315
PACKAGE INFORMATION
44-PIN, LQFP (BODY SIZE: 10MM X 10MM; PITCH: 0.80MM; THK BODY: 1.40MM)
Symbol A A1 A2 b C D D1 E E1 e L L1
Notes: 1. All dimensions are in millimeters. 2. Refer to DEDEC MS-026BCB
Min. 0.05 1.35 0.30 0.09
0.45 0
Nom. 1.40 0.37 12.00 BSC 10.00 BSC 12.00 BSC 10.00 BSC 0.8 BSC 0.60 1.00 REF 3.5
Max. 1.60 0.15 1.45 0.45 0.20
0.75 7
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PT6315 IMPORTANT NOTICE
Princeton Technology Corporation (PTC) reserves the right to make corrections, modifications, enhancements, improvements, and other changes to its products and to discontinue any product without notice at any time. PTC cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a PTC product. No circuit patent licenses are implied. Princeton Technology Corp. 2F, 233-1, Baociao Road, Sindian, Taipei 23145, Taiwan Tel: 886-2-66296288 Fax: 886-2-29174598 http://www.princeton.com.tw
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